this post was submitted on 26 Sep 2023
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RiscV

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This isn't a rip on RISC-V but it's something I notice a lot with ARM and RISC SBCs compared to x86, which seems to support Linux, Windows, MacOS regardless of the device specs.

On other platforms, the developers have to build special iso images for each device, even though the underlying OS supports the whole architecture.

If I wanted to move to a new device (say, upgrade my Raspberry pi 4B to an Orange Pi, or other RISC-V alternatives) I'd have to ensure the new device had support from my OS choice, download a new image for it, and manually port stuff across. (as far as I can tell).

What's the technical reason that x86 can configure the OS on the fly but ARM/RISC can't?

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[–] eksb@programming.dev 9 points 1 year ago

x86 computers have BIOS or UEFI which provides a way for the OS find the hardware. ARM devices generally do not have a counterpart to BIOS/UEFI. More details here: https://unix.stackexchange.com/questions/721976/why-is-it-harder-to-upgrade-an-arm-device-vs-an-x86-device-with-newer-linux-ker

[–] dustyData 1 points 1 year ago

Age. Every risc-v new computer is a bespoke chip design. While most x86 chips are variations of designs that have existed for decades.

One of the most important jobs of the OS is to interface software and hardware. New hardware needs new definitions to interoperate with the user level software (drivers). Which mean entirely new and bespoke OS images. While new x86 have some form of backwards compatibility with old drivers. Some old OS images work with some newer hardware.

Think of Android, where only one particular OS image made by the vendor works with a particular hardware (ARM chip). While it has taken linux a long time to get the kernel working on ARM phones, only a few phones are actually supported. This same reality applies to risc-v. Bespoke hardware needs bespoke software.

[–] rsh -1 points 1 year ago

I’m not a hardware engineer or a programmer, but I’m guessing it has to do with the reduced number of instructions on the ARM/RISC CPUs.