this post was submitted on 25 Sep 2024
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Intel optimizes slimmed-down X86S instruction set — revision 1.2 eliminates 16-bit and 32-bit features (www.tomshardware.com)
submitted 1 month ago by Alphane_Moon to c/hardware
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[–] [email protected] 6 points 1 month ago (2 children)

Not sure whether to be excited or concerned.

I think this is a necessary and inevitable consequence of the insurgence of competitive ARM CPUs unencumbered by legacy ISAs (mainly the ones from Apple, I'm not sure Samsung's is even in the conversation). If the Apple Silicon chips are any indication, the performance benefits could be massive.

But if Intel cuts AMD out, or price-gouges them for the "honor" of developing compatible CPUs, that hurts the whole industry—even Intel—in the long run. And I don't trust the bean counters at Intel to take the long view over the earnings of next fiscal quarter.

[–] [email protected] 4 points 1 month ago

Itanium 2: electric boogaloo.

[–] [email protected] 2 points 1 month ago (1 children)

I guess it's time to get rid of legacy stuff in modern chips. If nothing else, to make them cheaper to produce. Older instruction sets can still be emulated, just like Apple did it. Said that, I doubt that there will be massive performance gains just from this because it's still the same architecture, but let's hope if this actually sees the light.

[–] Dubiousx99 1 points 1 month ago (1 children)

If those instruction sets take up a set place on the processing pipeline, eliminating them could be a huge performance boost. Additionally, the removal of the instruction sets would reduce the size of the chip’s die which could result in shorter signal paths.

[–] [email protected] 2 points 1 month ago

I don't have enough hardware knowledge to dispute that, but I have a feeling that's not that easy to gain massive performance boost. If I recall correctly, the biggest Apple's ARM CPU advantage has to do with fixed instruction length whereas x86 is variable. Fixed one gives you an prediction advantage because you exactly know how many instructions are in cache and where are they located - something along this. But let's hope for the better.