AMD's core technology is set to advance significantly with the upcoming Zen 4 and Zen 5 cores. The Zen 4 cores, expected to arrive in 4nm and 5nm variants, could bring a sweeping refresh to all AMD chips or be selectively used for specific chip categories. Meanwhile, Zen 5 cores will launch with a 4nm process and eventually include 3nm variants. The timeline for these cores' debut is slated for 2024, according to AMD's CPU roadmap slide.
Zen 4c and Zen 5c cores will play a pivotal role in the construction of ultra-dense server chips optimized for heavily-threaded cloud workloads, similar to efficiency cores found in other chip architectures. An exciting reveal is the forthcoming EPYC Bergamo chips, which will feature Zen 4c cores and support a staggering 128 cores and 256 threads. The 'c' cores, smaller than the standard Zen 4 core, are geared towards improved compute density and increased core counts, although specific cache configuration details remain undisclosed.
In a significant leap forward, AMD's Zen 5 architecture will undergo a major redesign and hit the market in 2024. This redesign is set to deliver improved performance and efficiency, achieved through a re-pipelined front end and increased issue width. Moreover, AMD intends to integrate AI and machine learning optimizations into the architecture, although details regarding this addition remain sparse.
AMD's chiplet-based architecture, enabled by the Infinity Architecture, plays a vital role in the company's chipmaking capabilities. It allows for the connection of chiplets, memory, I/O dies, and even data center application accelerators like GPUs. Plans are underway to extend this technology to include Xilinx IP and third-party vendor IP support, broadening its chiplet-based production scope.
Finally, AMD is set to support the Compute Express Link (CXL) and the Universal Chiplet Interconnect Express (UCIe) consortium. CXL is an industry-standard cache-coherent interconnect providing an interface between CPUs and other devices, while UCIe aims to standardize die-to-die interconnects between chiplets, reducing costs and promoting a broader ecosystem of validated chiplets. These new additions further cement AMD's leading position in chiplet-based products.
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