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New RISC-V emulator for Computer Science education | GitHub - gboncoffee/egg: Emulador Genérico do Gabriel (github.com)

submitted 10 months ago* (last edited 10 months ago) by [email protected] to c/[email protected]

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New RISC-V emulator for Computer Science education (github.com/gboncoffee)

Just released EGG, an emulator created for teaching Assembly and microprocessors (designed to suit the needs of the Microprocessors classes, at Universidade Federal do Paraná, Brazil). The emulator will support multiple architetures in the future, but currently only RISC-V is implemented.

The egg package itself provides only an interface for interacting with machines, thus supporting different architeture backends. Currently, the only backend implemented is egg/riscv, which implements a RISC-V IM 32 bits machine. A MIPS backend is coming soon.

egg/assembler also provides a small library for creating assemblers, and the support for EGG's debugger.

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