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The original was posted on /r/linux by /u/Lionne777Sini on 2023-07-18 01:25:20+00:00.
I'm trying to run some old legacy chip programmer (Xeltek SuperPro III) that used to run on DOS and WIndows and uses LPT port for connection.
On the PC end, I have small PCIe card with MosChip 9912 (I think). It has 2x COm ports and 1 LPT.
Cards gets recognised by kernel and COM ports work, but "lspci" tells me that there is something wrong during the enumeration and legacy I/O ports never actually get mapped onto low 256 I/O ports.
Also, chip seems to have default ports in the 0xd000 range instead of 0x00-0xff.
But even that doesn't seem to work. kernel sems to try to map 2 serial ports into 0xd020-27, second into 0x2030-37 and lspci lists that, but dmesg says that this allocation failed:
Couldn't register serial port d030, irq 33, type 0, error -28
For the parallel port, I don't even have that.
I seem to remember reading that kernel stopped using low I/O ports by default, but now I can't find anything about it, nor the switch to enable it back.
"lspci -s 03:00.2 -vv" (my parallel port):
03:00.2 Parallel controller: MosChip Semiconductor Technology Ltd. PCIe 9912 Multi-I/O Controller (prog-if 03 [IEEE1284])
Subsystem: Asix Electronics Corporation (Wrong ID) PCIe 9912 Multi-I/O Controller
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- SERR- <PERR- INTx-
Interrupt: pin C routed to IRQ 255
Region 0: I/O ports at d010 [disabled] [size=8]
Region 1: I/O ports at d000 [disabled] [size=8]
Region 2: Memory at fcd01000 (32-bit, non-prefetchable) [disabled] [size=4K]
Region 5: Memory at fcd00000 (32-bit, non-prefetchable) [disabled] [size=4K]
Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [78] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [80] Express (v1) Legacy Endpoint, MSI 00
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <1us, L1 <2us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: CorrErr+ NonFatalErr+ FatalErr+ UnsupReq+
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr+ NonFatalErr- FatalErr- UnsupReq+ AuxPwr- TransPend-
LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <64ns, L1 unlimited
ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp-
LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk-
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1
TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr+ BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+
AERCap: First Error Pointer: 00, ECRCGenCap- ECRCGenEn- ECRCChkCap- ECRCChkEn-
MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
HeaderLog: 00000000 00000000 00000000 00000000\
Anyone with a clue what's going on and what needs to be flipped ?
I've tried googling around for recent posts and found that during the last were people were doing access on I/O ports to play with their COM and LPT ports low level, it just doesn't work for me...
