RISC-V

879 readers
3 users here now

RISC-V (pronounced "risk-five") is a license-free, modular, extensible instruction set architecture (ISA).

riscv.org

Youtube | Twitter

Matrix space

Other RISC-V communities on Lemmy

founded 3 years ago
MODERATORS
76
 
 

Hey everyone,

I've noticed this community is a bit barren. I'd like to add some posts myself but from a more ignorant POV.

It has come to my attention that there is not nearly enough software torture in my life. Hearing how companies are starting to add barriers to so-called "Translation layers" and other software pieces that give functionality to the underlying hardware...

What types of projects does the open source community need to pursue with respect to RISC-V drivers, firmware, or other necessary pieces to somewhat guarantee that the processor is compatible with GPUs, RAM, I/O, and other low level functions that hardware components perform?

Where should I start in my RISC-V journey? Is there a beginner computer or developer kit that I can purchase that won't incinerate my wallet? I don't expect to game or train LLMs off of a RISC-V-based computer, but am curious as to what a fully free hardware setup would consist of.

Love the idea of RISC-V!

77
78
79
80
81
82
83
84
85
86
-12
submitted 11 months ago* (last edited 11 months ago) by [email protected] to c/[email protected]
87
88
89
90
91
92
93
94
95
96
 
 

The AMD MicroBlaze™ V processor is a soft-core RISC-V processor IP for AMD adaptive SoCs and FPGAs. The MicroBlaze V processor is based on a 32-bit RISC-V instruction set architecture (ISA). It allows developers to leverage the open-source RISC-V software ecosystem, is hardware compatible with the classic MicroBlaze processor, and is fully integrated in the Vivado™ and Vitis™ tools design flow. The MicroBlaze V processor is designed to be highly modular with a configurable architecture suitable for embedded systems applications.

97
98
99
 
 

US politicians really don't seem to be able to grasp the idea of Open Standards, do they? :/

100
7
RISC-V + CHERI (www.electronicsweekly.com)
submitted 1 year ago by 3arn0wl to c/[email protected]
view more: ‹ prev next ›